Mixed-Precision Training and Compilation for RRAM-based Computing-in-Memory Accelerators

ArXi:2601.21737v3 Announce Type: replace Computing-in-Memory (CIM) accelerators are a promising solution for accelerating Machine Learning (ML) workloads, as they perform Matrix-Vector Multiplications (MVMs) on crossbar arrays directly in memory. Although the bit widths of the crossbar inputs and cells are very limited, most CIM compilers do not quantization below 8 bit. As a result, a single MVM requires many compute cycles, and weights cannot be efficiently d in a single crossbar cell. To address this problem, we propose a mixed-precision.