AI RESEARCH
TOPCELL: Topology Optimization of Standard Cell via LLMs
arXiv CS.LG
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ArXi:2604.14237v1 Announce Type: new Transistor topology optimization is a critical step in standard cell design, directly dictating diffusion sharing efficiency and downstream routability. However, identifying optimal topologies remains a persistent bottleneck, as conventional exhaustive search methods become computationally intractable with increasing circuit complexity in advanced nodes. This paper