AI RESEARCH
FPGA-Based Hardware Architecture for Contrast Maximization in Event-Based Vision
arXiv CS.CV
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ArXi:2605.09581v1 Announce Type: new This paper presents a hardware architecture that implements the Contrast Maximization (CM) algorithm in Field-Programmable Gate Array (FPGA) resources for event-based vision systems. CM estimates motion parameters by maximizing the contrast of an Image of Warped Events (IWE) reconstructed from asynchronous event streams. Event-based vision sensors generate sparse data with high temporal resolution and low spatial redundancy, which makes them well suited for hardware processing.